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CAT3649
Figure 28. ADIM Dimming Timing Diagram (no C PWM , PWM high)
C PWM w
40
(2 p R f PWM )
C PWM w
+ 42 nF
40
(2 p
150
10 3
10 3 )
C PWM Filtering Capacitor
The PWM input signal controls the LED current
proportionally to its duty cycle. When the LED driver
operates in PWM dimming mode, the C PWM capacitor
minimizes the LED current ripple. This prevents audio noise
from the LED driver output capacitors as the PWM signal is
converted into a near DC current internally. The PWM input
is a logic input and the amplitude of the PWM signal does
not affect the LED current. An internal 4 m A current source
is charging the C PWM capacitor when the PWM input is high
until it reaches a maximum voltage; see Figure 29 block
diagram. The internal resistor R (150 k W ) and external
capacitor C PWM act as a low pass filter with a cut ? off
frequency f C = 1 / 2 π R C PWM .
To minimize the ripple current, we recommend the PWM
frequency f PWM to be at least 40 times greater than the
cut ? off frequency f C :
f PWM w 40 f C or (eq. 2)
(eq. 3)
For example for f PWM = 1 kHz, the capacitor value is:
(eq. 4)
We recommend a 47 nF capacitor C PWM compatible for
any PWM frequency between 1 kHz and 200 kHz. For PWM
frequency below 1 kHz, the above formula will provide the
recommended capacitor value.
The C PWM capacitor affects the power ? up time which is
the time to reach the nominal LED current. The power ? up
time (t PU ) is proportional to the C PWM capacitor value and
can be calculated as follows.
t PU ^ C PWM 3 10 5 (eq. 5)
For example, for C PWM = 47 nF, t PU is about 15 ms.
4 m A
PWM
N1
Buffer
R
150 k W
CPWM
V C
G1
Voltage ?
controlled
current
source
47 nF
I = LED
current
reference
I = g x V C
(for LED at
max current,
g = 0.045)
GND
Figure 29. PWM Circuit Block Diagram
http://onsemi.com
11
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